The semiconductor industry has experienced rapid growth. The improvements in the density of various electronic components, such as transistors, diodes, resistors, capacitors, allows more components to be integrated into a given area. The number and lengths of interconnections also increase with the increasing density of the electronic components, so are circuit RC delay and power consumption. However, the volume of the integrated components is two dimensional (2D) in nature which is essentially on the surface of the semiconductor wafer. The density of the components on the wafer surface has physical limitation. To solve such limitations, three-dimensional integrated circuit (3D IC) with stacked dies may be introduced which promises the higher speed and density, smaller size, and multifunctional electronic devices.
By integrating multiple dies in a vertical direction, through-silicon vias (TSVs) may be used in such as the stacked dies to connect the dies with different functions and devices TSVs are vias that extend completely through the semiconductor wafer substrate to allow chip-to-chip interconnect schemes or wafer-to-wafer interconnect schemes compatible with 3D wafer-level packaging. The TSVs are filled with conductive material, and connective pads are formed on top and bottom of the conductive material. TSVs are also used to route signals from one surface of a die to the opposite surface, which provides a shorter interconnection distance in contrast with a 2D structure. TSVs are much larger than other standard cells in a design, and thus impact IC performance in a greater degree. Accordingly, improvements in TSVs continue to be sought.